View MC9RS08KA8CTG_9011237.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

freescale semiconductor data sheet: technical data document number: mc9rs08ka8 rev. 2, 10/2008 ? freescale semiconductor, inc., 2008. all rights reserved. this document contains information on a prod uct under development. freescale reserves the right to change or discontinue this product without notice. mc9rs08ka8 features: ? 8-bit rs08 central processor unit (cpu) ? up to 20 mhz cpu at 1.8 v to 5.5 v across temperature range of ?40c to 85c ? subset of hc08 instruction set with added bgnd instruction ?on-chip memory ? 8 kb flash read/program/erase over full operating voltage and temperature; ka4 has 4 kb flash ? 254 byte random-access memo ry (ram); ka4 has 126 byte ram ? security circuitry to prev ent unauthorized access to ram and flash contents ? power-saving modes ? wait and stop ? wakeup from power-saving modes using real-time interrupt (rti), kbi, or acmp ? clock source options ? oscillator (xosc) ? loop- control pierce oscillator; crystal or ceramic resonator range of 31.25 khz to 39.0625 khz or 1 mhz to 5 mhz ? internal clock source (ics ) ? internal clock source module containing a frequency-locked-loop (fll) controlled by internal or ex ternal reference; precision trimming of internal reference allows 0.2% resolution and 2% deviation over temperature and voltage; supports bus frequencies up to 10 mhz ? system protection ? watchdog computer operating properly (cop) reset with option to run from dedicated 1 khz internal clock source or bus clock ? low-voltage detection with reset or interrupt ? illegal opcode detection with reset ? illegal address detection with reset ? flash block protection ? development support ? single-wire background debug interface ? breakpoint capability to allow single breakpoint setting during in-circuit debugging ? peripherals ? adc ? 12-channel, 10-bit resolution; 2.5 s conversion time; automatic compare function; operation in stop; fully functional from 2.7 v to 5.5 v (8-channels available on 16-pin package) ? tpm ? one 2-channel; selectable input capture, output compare, or buffered edge- or center-aligned pwm on each channel ? iic ? inter-integrated circuit bus module capable of operation up to 100 kbps with maximum bus loading; capable of higher baudrates with reduced loading ? mtim1 and mtim2 ? two 8-bit modulo timers ? kbi ? keyboard interrupts with rising or falling edge detect; eight kbi ports in 16-pin and 20-pin packages ? acmp ? analog comparator: full rail-to-rail supply operation; option to compare to fixed internal bandgap reference voltage; can operate in stop mode ? input/output ? 14/18 gpios including one output only pin and one input only pin ? hysteresis and configurable pullup device on all input pins; configurable slew rate and drive strength on all output pins ? package options ? 16-pin soic, pdip or tssop ? 20-pin soic or pdip mc9rs08ka8 series covers: mc9rs08ka8 mc9rs08ka4 tbd 20-pin w-soic case 751d 16-pin w-soic case 751g 20-pin pdip case 738c 16-pin pdip case 648 tbd tbd tbd 16-pin tssop case 948f
mc9rs08ka8 series mcu data sheet, rev. 2 freescale semiconductor 2 table of contents 1 mcu block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 2 pin assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 3.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 3.2 parameter classification . . . . . . . . . . . . . . . . . . . . . . . . .5 3.3 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . .6 3.4 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . .6 3.5 esd protection and latch-up immunity . . . . . . . . . . . . .7 3.6 dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3.7 supply current characteristics . . . . . . . . . . . . . . . . . . .15 3.8 external oscillator (xosc) characteristics . . . . . . . . .18 3.9 ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.9.1 control timing . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.9.2 tpm/mtim module timing . . . . . . . . . . . . . . . . 20 3.10 analog comparator (acmp) electrical . . . . . . . . . . . . 20 3.11 internal clock source characteristics . . . . . . . . . . . . . 21 3.12 adc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.13 flash specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5 mechanical drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 revision history to provide the most up-to-date information, the re vision of our documents on the world wide web will be the most current. your printed copy may be an earlier revision. to ve rify you have the latest information available, refer to: http://freescale.com/ the following revision history table summariz es changes contained in this document. revision date description of changes 1 1/22/2008 initial public release 2 10/7/2008 updated figure 4 and figure 10 . updated ?how to reach us? information. added 16-pin tssop package information. related documentation find the most current versions of all documents at: http://www.freescale.com reference manual (mc9rs08ka8rm) contains extensive product informati on including modes of operation, memory, resets and interrupts, register defin ition, port pins, cpu, and all module information.
mcu block diagram mc9rs08ka8 series mcu data sheet, rev. 2 freescale semiconductor 3 1 mcu block diagram the block diagram, figure 1 , shows the structure of the mc9rs08ka8 mcu. figure 1. mc9rs08ka8 series block diagram 2 pin assignments this section shows the pin assignments in the packages available for the mc9rs08ka8 series. keyboard interrupt user flash user ram rs08 core cpu bdc 16-bit timer/pwm module (tpm) port b rs08 system control resets and interrupts modes of operation power management voltage regulator port a low-power oscillator 20 mhz internal clock source (ics) 31.25 khz to 39.0625 khz 1 mhz to 5 mhz (xosc) v ss v dd analog-to-digital converter (adc) 10-bit port c (mc9rs08ka8 = 8192 bytes) (mc9rs08ka4 = 4096 bytes) (mc9rs08ka8 = 254 bytes) (mc9rs08ka4 = 126 bytes) iic module(iic) analog comparator (acmp) 8-bit timer (mtim1 and mtim2) v pp cop wakeup rti lvd ptc0/adp8 ptb3/kbip7/adp7 ptb2/kbip6/adp6 ptb1/kbip5/adp5 ptb0/kbip4/adp4 pta2/kbip2/sda/adp2 pta3/kbip3/scl/adp3 pta1/kbip1/tpmch1/adp1/acmp? pta0/kbip0/tpmch0/adp0/acmp+ ptc1/adp9 ptc2/adp10 ptb4/tpmch0 ptc3/adp11 pta5/tclk/reset /v pp pta4/acmpo/bkgd/ms ptb7/scl/extal ptb6/sda/xtal ptb5/tpmch1
mc9rs08ka8 series mcu data sheet, rev. 2 pin assignments freescale semiconductor 4 figure 2. mc9rs08ka8 series in 20-pin pdip/soic package table 1. pin availability by package pin-count pin number <-- lowest priority --> highest 20 16 port pin alt 1 alt 2 alt 3 alt 4 1 1 pta5 tclk reset v pp 2 2 pta4 acmpo bkgd ms 33 v dd 44 v ss 5 5 ptb7 scl 1 1 iic pins can be remapped to pta3 and pta2 extal 6 6 ptb6 sda 1 xtal 7 7 ptb5 tpmch1 2 2 tpm pins can be remapped to pta0 and pta1 8 8 ptb4 tpmch0 2 9 ? ptc3 adp11 10 ? ptc2 adp10 11 ? ptc1 adp9 12 ? ptc0 adp8 13 9 ptb3 kbip7 adp7 14 10 ptb2 kbip6 adp6 15 11 ptb1 kbip5 adp5 16 12 ptb0 kbip4 adp4 17 13 pta3 kbip3 scl 1 adp3 18 14 pta2 kbip2 sda 1 adp2 19 15 pta1 kbip1 tpmch1 2 adp1 acmp? 20 16 pta0 kbip0 tpmch0 2 adp0 acmp+ 1 2 3 4 5 6 7 8 9 10 11 13 14 ptc2/adp10 ptb4/tpmch0 ptc3/adp11 ptc0/adp8 ptb3/kbip7/adp7 ptb2/kbip6/adp6 ptb1/kbip5/adp5 ptb0/kbip4/adp4 pta2/kbip2/sda/adp2 pta3/kbip3/scl/adp3 pta1/kbip1/tpmch1/adp1/acmp? pta0/kbip0/tpmch0/adp0/acmp+ ptc1/adp9 pta5/tclk/reset /v pp pta4/acmpo/bkgd/ms v dd v ss ptb7/scl/extal ptb6/sda/xtal ptb5/tpmch1 15 16 17 18 19 20 12
electrical characteristics mc9rs08ka8 series mcu data sheet, rev. 2 freescale semiconductor 5 figure 3. mc9rs08ka8 series in 16-pin pdip/soic/tssop package 3 electrical characteristics 3.1 introduction this chapter contains electrical a nd timing specifications for the mc9rs08ka8 seri es of microcontrollers available at the time of publication. 3.2 parameter classification the electrical parameters shown in this supplem ent are guaranteed by various methods. to give the customer a better understanding the following classi fication is used and the parameters are tagged accordingly in the tabl es where appropriate: note the classification is shown in the column labeled ?c? in the parameter tables where appropriate. table 2. parameter classifications p those parameters are guaranteed during produ ction testing on each individual device. c those parameters are achieved by the design charac terization by measuring a statistically relevant sample size across process variations. t those parameters are achieved by design characteri zation on a small sample size from typical devices under typical conditions unless otherwise noted. all va lues shown in the typical column are within this category. d those parameters are derived mainly from simulations. 1 2 3 4 5 6 7 8 9 10 11 13 14 15 16 12 ptb3/kbip7/adp7 ptb2/kbip6/adp6 ptb1/kbip5/adp5 ptb0/kbip4/adp4 pta2/kbip2/sda/adp2 pta3/kbip3/scl/adp3 pta1/kbip1/tpmch1/adp1/acmp? pta0/kbip0/tpmch0/adp0/acmp+ ptb4/tpmch0 pta5/tclk/reset /v pp pta4/acmpo/bkgd/ms v dd v ss ptb7/scl/extal ptb6/sda/xtal ptb5/tpmch1
mc9rs08ka8 series mcu data sheet, rev. 2 electrical characteristics freescale semiconductor 6 3.3 absolute maximum ratings absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. stress beyond th e limits specified in table 3 may affect device reliability or cause permanent damage to the device. for functiona l operating conditions, refer to the re maining tables in this chapter. this device contains circuitry protect ing against damage due to high static voltage or electrical fields; however, it is advised that normal precautions be ta ken to avoid application of any voltages higher than maximum-rated voltages to this high- impedance circuit. reliability of operation is enhanced if unused inputs are tied to an appropriate l ogic voltage level (for instance, v ss or v dd ) or the programmable pull-up resistor associated with the pin is enabled. 3.4 thermal characteristics this section provides information about operating temperature range, power dissipation, and package thermal resistance. power dissipation on i/o pins is usually small compared to the power dissipation in on-chip logic and voltage re gulator circuits and it is user-determined rather than being controlled by the mcu design. in order to take p i/o into account in power calculations , determine the difference between actual pin voltage and v ss or v dd and multiply by the pin current for each i/o pin. except in cases of unusually high pin current (h eavy loads), the difference between pin voltage and v ss or v dd will be very small. table 3. absolute maximum ratings rating symbol value unit supply voltage v dd ?0.3 to 5.8 v maximum current into v dd i dd 120 ma digital input voltage v in ?0.3 to v dd + 0.3 v instantaneous maximum current single pin limit (applies to all port pins) 1 , 2 , 3 1 input must be current limited to the va lue specified. to determine the value of the required current-limiting resistor, calculate resistance values for positive (v dd ) and negative (v ss ) clamp voltages, then use the larger of the two resistance values. 2 all functional non-supply pins are internally clamped to v ss and v dd except the reset /v pp pin which is internally clamped to v ss only. 3 power supply must maintain regulation within operating v dd range during instantaneous and operating maximum current conditions. if positive injection current (v in > v dd ) is greater than i dd , the injection current may flow out of v dd and could result in external power supply going out of regulation. ensure external v dd load will shunt current greater than maximum injection current. this will be the greatest ri sk when the mcu is not consum ing power. examples are: if no system clock is present, or if the clock rate is very low which would reduce overall power consumption. i d 25 ma storage temperature range t stg ?55 to 150 c table 4. thermal characteristics rating symbol value unit operating temperature range (packaged) t a t l to t h ?40 to 85 c maximum junction temperature t jmax 105 c thermal resistance 16-pin pdip ja 80 c/w thermal resistance 16-pin soic ja 112 c/w
electrical characteristics mc9rs08ka8 series mcu data sheet, rev. 2 freescale semiconductor 7 the average chip-junction temperature (tj) in c can be obtained from: t j = t a + (p d ja ) eqn. 1 where: t a = ambient temperature, c ja = package thermal resistance, junction-to-ambient, c /w p d = p int + p i/o p int = i dd v dd , watts chip internal power p i/o = power dissipation on input an d output pins user determined for most applications, p i/o << p int and can be neglected. an approxima te relationship between pd and tj (if p i/o is neglected) is: p d = k (t j + 273 c) eqn. 2 solving equation 1 and equation 2 for k gives: k = p d (t a + 273 c) + ja (pd) 2 eqn. 3 where k is a constant pertaining to the pa rticular part. k can be determined from equation 3 by measuring p d (at equilibrium) for a known t a . using this value of k, the values of p d and t j can be obtained by solving equations 1 and 2 iteratively for any value of t a . 3.5 esd protection and latch-up immunity although damage from electrostatic di scharge (esd) is much less comm on on these devices than on early cmos circuits, normal handling preca utions must be used to avoid exposure to static discharge. qualification tests are performed to ensure that these devices can with stand exposure to reasonable levels of static without suffer ing any permanent damage. all esd testing is in conformit y with aec-q100 stress test qual ification for automotive grade integrated circuits. during the device qualification esd stresses were performed for the human body model (hbm), the machine model (mm) and the charge device model (cdm). a device is defined as a failure if after exposure to esd pulses the device no longer meets the device specification. complete dc parametr ic and functional testing is perf ormed per the applicable device specification at room temperature followed by hot te mperature, unless specified otherwise in the device specification. thermal resistance 16-pin tssop ja 75 c/w thermal resistance 20-pin pdip ja 75 c/w thermal resistance 20-pin soic ja 96 c/w table 4. thermal characteristics (continued) rating symbol value unit
mc9rs08ka8 series mcu data sheet, rev. 2 electrical characteristics freescale semiconductor 8 3.6 dc characteristics this section includes information about power supply requirements, i/o pin char acteristics, and power supply current in various operating modes. table 5. esd and latch-up test conditions model description symbol value unit human body series resistance r1 1500 storage capacitance c 100 pf number of pulses per pin ? 3 ? machine series resistance r1 0 storage capacitance c 200 pf number of pulses per pin ? 3 ? latch-up minimum input voltage limit ? ?2.5 v maximum input voltage limit ? 7.5 v table 6. esd and latch-up protection characteristics no. rating 1 1 parameter is achieved by design characterization on a small sample size from typical devices under typical conditions unless otherwise noted. symbol min max unit 1 human body model (hbm) v hbm 2000 ? v 2 machine model (mm) v mm 200 ? v 3 charge device model (cdm) v cdm 500 ? v 4 latch-up current at t a = 85 c (applies to all pins except pin 9 ptc3/adp11) i lat 100 2 2 these pins meet jesd78a class ii (section 1. 2) level a (section 1.3) requirement of 100ma. ?ma latch-up current at t a = 85 c (applies to pin 9 ptc3/adp11) i lat 75 3 3 this pin meets jesd78a class ii (section 1.2) level b (section 1.3) characterization to 75ma. this pin is only present on 20 pin package types. ?ma table 7. dc characteristics (temperature range = ?40 to 85 c ambient) parameter symbol min typical max unit supply voltage (run, wait and stop modes.) 0 < f bus <10mhz v dd 1.8 ? 5.5 v minimum ram retention supply voltage applied to v dd v ram 0.8 1 ??v low-voltage detection threshold (v dd falling) (v dd rising) v lv d 1.80 1.88 1.86 1.94 1.95 2.03 v power on reset (por) voltage v por 1 0.9 ? 1.7 v input high voltage (v dd > 2.3v) (all digital inputs) v ih 0.70 v dd ??v input high voltage (1.8 v v dd 2.3 v) (all digital inputs) v ih 0.85 v dd ??v
electrical characteristics mc9rs08ka8 series mcu data sheet, rev. 2 freescale semiconductor 9 input low voltage (v dd > 2.3 v) (all digital inputs) v il ? ? 0.30 v dd v input low voltage (1.8 v v dd 2.3 v) (all digital inputs) v il ? ? 0.30 v dd v input hysteresis (all digital inputs) v hys 1 0.06 v dd ??v input leakage current (per pin) v in = v dd or v ss , all input only pins |i in | ? 0.025 1.0 a high impedance (off-state) leakage current (per pin) v in = v dd or v ss , all input/output |i oz | ? 0.025 1.0 a internal pullup resistors 2 (all port pins) r pu 20 45 65 k internal pulldown resistors 2 (all port pins except pta5) r pd 20 45 65 k pta5 internal pulldown resistor ?45?95k output high voltage ? low drive (ptxdsn = 0) 5 v, i load = 2 ma 3 v, i load = 1 ma 1.8 v, i load = 0.5 ma v oh v dd ? 0.8 ? ? ? ? ? ? v output high voltage ? high drive (ptxdsn = 1) 5 v, i load = 5 ma 3 v, i load = 3 ma 1.8 v, i load = 2 ma v dd ? 0.8 ? ? ? ? ? ? maximum total i oh for all port pins |i oht |? ? 40 ma output low voltage ? low drive (ptxdsn = 0) 5 v, i load = 2 ma 3 v, i load = 1 ma 1.8 v, i load = 0.5 ma v ol ? ? ? ? ? ? 0.8 v output low voltage ? high drive (ptxdsn = 1) 5 v, i load = 5 ma 3 v, i load = 3 ma 1.8 v, i load = 2 ma ? ? ? ? ? ? 0.8 maximum total i ol for all port pins i olt ?? 40 ma dc injection current 3 , 4 , 5 , 6 v in < v ss , v in > v dd single pin limit total mcu limit, includes sum of all stressed pins ? ? ? ? 0.2 0.8 ma input capacitance (all non-supply pins) c in ??7pf 1 this parameter is characterized and not tested on each device. 2 measurement condition for pull resistors: v in = v ss for pullup and v in = v dd for pulldown. 3 all functional non-supply pins are internally clamped to v ss and v dd except the reset /v pp which is internally clamped to v ss only. 4 input must be current limited to the valu e specified. to determine the value of the required current-limiting resistor, calcula te resistance values for positive and negative clamp voltages, then use the larger of the two values. 5 input must be current limited to the valu e specified. to determine the value of the required current-limiting resistor, calcula te resistance values for positive and negative clamp voltages, then use the larger of the two values. 6 this parameter is characterized and not tested on each device. table 7. dc characteristics (temperature range = ?40 to 85 c ambient) (continued) parameter symbol min typical max unit
mc9rs08ka8 series mcu data sheet, rev. 2 electrical characteristics freescale semiconductor 10 figure 4. typical i oh vs. v dd ?v oh v dd = 5.5 v (high drive) figure 5. typical i oh vs. v dd ?v oh v dd = 5.5 v (low drive) i oh vs v dd -v oh (high drive) at v dd = 5.5 v -25 -20 -15 -10 -5 0 0.1 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 v dd -v oh (v) i oh (ma) 85c 25c -40c i oh vs v dd -v oh (low drive) at v dd = 5.5 v -12 -10 -8 -6 -4 -2 0 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 v dd -v oh (v) i oh (ma) 85c 25c -40c
electrical characteristics mc9rs08ka8 series mcu data sheet, rev. 2 freescale semiconductor 11 figure 6. typical i oh vs. v dd ?v oh v dd = 3 v (high drive) figure 7. typical i oh vs. v dd ?v oh v dd = 3 v (low drive) i oh vs v dd -v oh (high drive) at v dd = 3 v -20 -15 -10 -5 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 v dd -v oh (v) i oh (ma) 85c 25c -40c i oh vs v dd -v oh (low drive) at v dd = 3 v -5 -4 -3 -2 -1 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 v dd -v oh (v) i oh (ma) 85c 25c -40c
mc9rs08ka8 series mcu data sheet, rev. 2 electrical characteristics freescale semiconductor 12 figure 8. typical i oh vs. v dd ?v oh v dd = 1.8 v (high drive) figure 9. typical i oh vs. v dd ?v oh v dd = 1.8 v (low drive) i oh vs v dd -v oh (high drive) at v dd = 1.8 v -7 -6 -5 -4 -3 -2 -1 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v dd -v oh (v) i oh (ma) 85c 25c -40c i oh vs v dd -v oh (low drive) at v dd = 1.8 v -1.4 -1.2 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v dd -v oh (v) i oh (ma) 85c 25c -40c
electrical characteristics mc9rs08ka8 series mcu data sheet, rev. 2 freescale semiconductor 13 figure 10. typical i ol vs. v dd ?v ol v dd = 5.5 v (high drive) figure 11. typical i ol vs. v dd ?v ol v dd = 5.5 v (low drive) i ol vs v ol (high drive) at v dd = 5.5 v 0 5 10 15 20 25 0.1 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 v ol (v) i ol (ma) 85c 25c -40c i ol vs v ol (low drive) at v dd = 5.5 v 0 5 10 15 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 v ol (v) i ol (ma) 85c 25c -40c
mc9rs08ka8 series mcu data sheet, rev. 2 electrical characteristics freescale semiconductor 14 figure 12. typical i ol vs. v dd ?v ol v dd = 3 v (high drive) figure 13. typical i ol vs. v dd ?v ol v dd = 3 v (low drive) i ol vs v ol (high drive) at v dd = 3 v 0 5 10 15 20 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 v ol (v) i ol (ma) 85c 25c -40c i ol vs v ol (low drive) at v dd = 3 v 0 1 2 3 4 5 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 v ol (v) i ol (ma) 85c 25c -40c
electrical characteristics mc9rs08ka8 series mcu data sheet, rev. 2 freescale semiconductor 15 figure 14. typical i ol vs. v dd ?v ol v dd = 1.8 v (high drive) figure 15. typical i ol vs. v dd ?v ol v dd = 1.8 v (low drive) 3.7 supply current characteristics table 8. supply current characteristics parameter symbol v dd (v) typical 1 max 2 temp. ( c) run supply current 3 measured at (f bus = 10 mhz) ri dd10 5 2.4 ma 5 ma 25 85 3 2.4 ma ? 25 85 1.80 1.7 ma ? 25 85 i ol vs v ol (high drive) at v dd = 1.8 v 0 1 2 3 4 5 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v ol (v) i ol (ma) 85c 25c -40c i ol vs v ol (low drive) at v dd = 1.8 v 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v ol (v) i ol (ma) 85c 25c -40c
mc9rs08ka8 series mcu data sheet, rev. 2 electrical characteristics freescale semiconductor 16 run supply current 3 measured at (f bus = 1.25 mhz) ri dd1 5 0.42 ma 2 ma 25 85 3 0.42 ma ? 25 85 1.80 0.3 ma ? 25 85 stop mode supply current si dd 5 2.4 a 5 a 8 a 25 85 3 2 a? 25 85 1.80 1.5 a? 25 85 adc adder from stop 4 ? 5 128 a 150 a 165 a 25 85 3 121 a? 25 85 1.80 79 a? 25 85 acmp adder from stop (acme = 1) ? 5 21 a22 a 25 85 3 18.5 a? 25 85 1.80 17.5 a? 25 85 rti adder from stop with 1 khz clock source enabled 5 ? 5 2.4 a2 a 25 85 3 1.9 a? 25 85 1.80 1.5 a? 25 85 rti adder from stop with 1 mhz external clock source reference enabled ? 5 2.1 a2 a 25 85 3 1.6 a? 25 85 1.80 1.2 a? 25 85 lvi adder from stop (lvde=1 and lvdse=1) ? 5 70 a80 a 25 85 3 65 a? 25 85 1.80 60 a? 25 85 1 typicals are measured at 25 c. 2 maximum value is measured at the nominal v dd voltage times 10% tolerance. values given here are preliminary estimates prior to completing characterization. 3 not include any dc loads on port pins. 4 required asynchronous adc clock and lvd to be enabled. table 8. supply current characteristics (continued) parameter symbol v dd (v) typical 1 max 2 temp. ( c)
electrical characteristics mc9rs08ka8 series mcu data sheet, rev. 2 freescale semiconductor 17 figure 16. typical run i dd vs. v dd for fei mode 5 most customers are expected to find th at auto-wakeup from stop can be used instead of the higher current wait mode. wait mode typical is 1.3 ma at 3 v and 1 ma at 2 v with f bus = 1 mhz. run i dd vs v dd at fei mode 0.00 0.50 1.00 1.50 2.00 2.50 3.00 5.5 5.0 3.3 3.0 2.7 2.0 1.8 1.7 run i dd (ma) v dd (v) 10 mhz 4 mhz 1.25 mhz
mc9rs08ka8 series mcu data sheet, rev. 2 electrical characteristics freescale semiconductor 18 3.8 external oscillator (xosc) characteristics 3.9 ac characteristics this section describes ac timing char acteristics for each peripheral system. table 9. oscillator electrical specifications (temperature range = ?40 to 125 c ambient) num c rating symbol min typical 1 1 typical data was characterized at 5.0 v, 25 c or is recommended value. max unit 1c oscillator crystal or resonator (erefs = 1, erclken = 1) low range (range = 0) high range (range = 1) fee or fbe mode 2 high range (range = 1, hgo = 1) fbelp mode high range (range = 1, hgo = 0) fbelp mode 2 the input clock source must be divided using rdiv to within the range of 31.25 khz to 39.0625 khz. f lo f hi f hi-hgo f hi-lp 32 1 1 1 ? ? ? ? 38.4 5 16 8 khz mhz mhz mhz 2 d load capacitors c 1, c 2 see crystal or resonator manufacturer?s recommendation. 3d feedback resistor low range (32 khz to 100 khz) high range (1 mhz to 16 mhz) r f ? ? 10 1 ? ? m 4d series resistor low range, low gain (range = 0, hgo = 0) low range, high gain (range = 0, hgo = 1) high range, low gain (range = 1, hgo = 0) high range, high gain (range = 1, hgo = 1) 8 mhz 4 mhz 1 mhz r s ? ? ? ? ? ? 0 100 0 0 0 0 ? ? ? 0 10 20 k 5c crystal start-up time 3 low range, low gain (range = 0, hgo = 0) low range, high gain (range = 0, hgo = 1) high range, low gain (range = 1, hgo = 0) 4 high range, high gain (range = 1, hgo = 1) 4 3 this parameter is characterized and not tested on each device . proper pc board layout procedures must be followed to achieve specifications. 4 4 mhz crystal. t cstl-lp t cstl-hgo t csth-lp t csth-hgo ? ? ? ? 200 400 5 20 ? ? ? ? ms 6d square wave input clock frequency (erefs = 0, erclken = 1) fee or fbe mode 2 fbelp mode f extal 0.03125 0 ? ? 5 40 mhz mcu extal xtal crystal or resonator r s c 2 r f c 1
electrical characteristics mc9rs08ka8 series mcu data sheet, rev. 2 freescale semiconductor 19 3.9.1 control timing figure 17. reset timing figure 18. kbi pulse width table 10. control timing num c parameter symbol min typical max unit 1 d bus frequency (t cyc = 1/f bus )f bus 0?10mhz 2 d real time interrupt internal oscillator period t rti 700 1000 1300 s 3 d external reset pulse width 1 1 this is the shortest pulse guaranteed to pass through the pin in put filter circuitry. shorter pulses may or may not be recogniz ed. t extrst 150 ? ? ns 4 d kbi pulse width 2 2 this is the minimum pulse width that is guaranteed to pass th rough the pin synchronization circuitry. shorter pulses may or may not be recognized. in stop mode, the synchronizer is bypa ssed so shorter pulses can be recognized in that case. t kbipw 1.5 t cyc ??ns 5 d kbi pulse width in stop 1 t kbipws 100 ? ? ns 6d port rise and fall time (load = 50 pf) 3 slew rate control disabled (ptxse = 0) slew rate control enabled (ptxse = 1) 3 timing is shown with respect to 20% v dd and 80% v dd levels. temperature range ?40 c to 85 c. t rise , t fall ? ? 11 35 ? ? ns t extrst reset t kbipw kbi pin t kbipw kbi pin (rising or high level) (falling or low level) t kbipws t kbipws
mc9rs08ka8 series mcu data sheet, rev. 2 electrical characteristics freescale semiconductor 20 3.9.2 tpm/mtim module timing synchronizer circuits determine the s hortest input pulses that can be re cognized or the fastest clock that can be used as the optional external source to the timer counter. these synchr onizers operate from the current bus rate clock. figure 19. timer external clock figure 20. timer input capture pulse 3.10 analog comparator (acmp) electrical table 11. tpm input timing num c rating symbol min max unit 1 d external clock frequency f tpmext dc f bus /4 mhz 2 d external clock period t tpmext 4?t cyc 3 d external clock high time t clkh 1.5 ? t cyc 4 d external clock low time t clkl 1.5 ? t cyc 5 d input capture pulse width t icpw 1.5 ? t cyc table 12. analog comparator electrical specifications num c characteristic symb ol min typical max unit 1 d supply voltage v dd 1.80 ? 5.5 v 2 p supply current (active) i ddac ?2035 a 3 d analog input voltage 1 v ain v ss ? 0.3 ? v dd v 4 p analog input offset voltage 1 v aio ?2040mv 5 c analog comparator hysteresis 1 v h 3.0 9.0 15.0 mv 6 c analog source impedance 1 r as ??10k 7 p analog input leakage current i alkg ??1.0 a 8 c analog comparator initialization delay t ainit ??1.0 s t tclk t clkh t clkl tclk t icpw tpmchn t icpw tpmchn
electrical characteristics mc9rs08ka8 series mcu data sheet, rev. 2 freescale semiconductor 21 3.11 internal clock source characteristics 3.12 adc characteristics 9p analog comparator bandgap reference voltage v bg 1.1 1.208 1.3 v 1 these data are characterized but not production tested. table 13. internal clock source specifications num c characteristic symbol min typical 1 1 data in typical column was characterized at 3.0 v and 5.0 v, 25 c or is typical recommended value. max unit 1 c average internal reference frequency ? untrimmed f int_ut 25 31.25 41.66 khz 2 p average internal reference frequency ? trimmed f int_t 31.25 39.06 39.0625 khz 3 c dco output frequency range ? untrimmed f dco_ut 12.8 16 21.33 mhz 4 p dco output frequency range ? trimmed f dco_t 16 20 20 mhz 5c resolution of trimm ed dco output frequency at fixed voltage and temperature f dco_res_t ?? 0.2 %f dco 6c total deviation of trimmed dco output frequency over voltage and temperature f dco_t ?? 2%f dco 7 c fll acquisition time 2 , 3 2 this parameter is characterized and not tested on each device. 3 this specification applies to any time the fll reference sour ce or reference divider is changed, trim value changed or changing from fll disabled (fbilp) to fll enabled (fei, fbi). t acquire ?? 1ms 8c stop recovery time (fll wakeup to previous acquired frequency) irefsten = 0 irefsten = 1 t_wakeup ? 100 86 ? s table 14. 5 volt 10-bit adc operating conditions c characteristic conditions symb min. typical max. unit d input voltage ? v adin v ss ?v dd v c accuracy v dd = 2 v ? ? 8 bit ? ? c input capacitance ? c adin ?4.55.5pf c input resistance ? r adin ?3 5k c analog source resistance external to mcu 10 bit mode f adck > 4mhz f adck < 4mhz r as ? ? ? ? 5 10 k 8 bit mode (all valid f adck )??10 table 12. analog comparator electrical specifications (continued) num c characteristic symb ol min typical max unit
mc9rs08ka8 series mcu data sheet, rev. 2 electrical characteristics freescale semiconductor 22 figure 21. adc input impedance equivalency diagram d adc conversion clock frequency high speed (adlpc=0) f adck 0.4 ? 8.0 mhz low power (adlpc=1) 0.4 ? 8.0 table 15. 10-bit adc characteristics characteristic conditions c symb min typical 1 max unit supply current adlpc = 1 adlsmp = 1 adco = 1 ?ti ddad ? 133 ? a supply current adlpc = 1 adlsmp = 0 adco = 1 ?ti ddad ? 218 ? a supply current adlpc = 0 adlsmp = 1 adco = 1 ?ti ddad ? 327 ? a supply current adlpc = 0 adlsmp = 0 adco = 1 ?ci ddad ?0.582 1ma table 14. 5 volt 10-bit adc op erating conditions (continued) c characteristic conditions symb min. typical max. unit + ? + ? v as r as c as v adin z as pad leakage due to input protection z adin simplified input pin equivalent circuit r adin adc sar engine simplified channel select circuit input pin r adin c adin input pin r adin input pin r adin
electrical characteristics mc9rs08ka8 series mcu data sheet, rev. 2 freescale semiconductor 23 3.13 flash specifications this section provides details about program/erase times and program-erase endurance for the flash memory. for detailed information about progr am/erase operations, see the reference manual. supply current stop, reset, module off t i ddad ?0.011 1 a adc asynchronous clock source high speed (adlpc = 0) t f adack ?3.3? mhz low power (adlpc = 1) ? 2 ? conversion time (including sample time) short sample (adlsmp=0) pt adc ?20? adck cycles long sample (adlsmp=1) ? 40 ? sample time short sample (adlsmp=0) pt ads ?3.5? adck cycles long sample (adlsmp=1) ? 23.5 ? total unadjusted error 10 bit mode ce tue ? 1 2.5 lsb 2 8 bit mode ? 0.5 1.0 differential non-linearity 10 bit mode p dnl ? 0.5 1.0 lsb 2 8 bit mode t ? 0.3 0.5 monotonicity and no-missing-codes guaranteed integral non-linearity 10 bit mode cinl ? 0.5 1.0 lsb 2 8 bit mode ? 0.3 0.5 zero-scale error 10 bit mode p e zs ? 0.5 1.5 lsb 2 8 bit mode t ? 0.5 0.5 full-scale error v adin = v dda 10 bit mode p e fs ? 0.5 1.5 lsb 2 8 bit mode t ? 0.5 0.5 quantization error 10 bit mode de q ?? 0.5 lsb 2 8 bit mode ? ? 0.5 input leakage error pad leakage 3 * r as 10 bit mode de il ? 0.2 2.5 lsb 2 8 bit mode ? 0.1 1 1 typical values assume temp = 25 c, f adck = 1.0 mhz unless otherwise stated. typical values are for reference only and are not tested in production. 2 1 lsb = (v refh ? v refl )/2 n 3 based on input pad leakage current. refer to pad electrical. table 16. flash characteristics characteristic symbol min typical 1 max unit supply voltage for program/erase v dd 2.7 ? 5.5 v table 15. 10-bit adc characteristics (continued) characteristic conditions c symb min typical 1 max unit
mc9rs08ka8 series mcu data sheet, rev. 2 electrical characteristics freescale semiconductor 24 figure 22. example v pp filtering program/erase voltage v pp 11.8 12 12.2 v v pp current program mass erase i vpp_prog i vpp_erase ? ? ? ? 200 100 a a supply voltage for read operation 0 < f bus < 10 mhz v read 1.8 ? 5.5 v byte program time t prog 20 ? 40 s mass erase time t me 500 ? ? ms cumulative program hv time 2 t hv ??8ms total cumulative hv time (total of t me & t hv applied to device) t hv_total ??2hours hven to program setup time t pgs 10 ? ? s pgm/mass to hven setup time t nvs 5?? s hven hold time for pgm t nvh 5?? s hven hold time for mass t nvh1 100 ? ? s v pp to pgm/mass setup time t vps 20 ? ? ns hven to v pp hold time t vph 20 ? ? ns v pp rise time 3 t vrs 200 ? ? ns recovery time t rcv 1?? s program/erase endurance t l to t h = ?40 c to 85 c ? 1000 ? ? cycles data retention t d_ret 15 ? ? years 1 typicals are measured at 25 c. 2 t hv is the cumulative high voltage programming time to the same row before next erase. same address can not be programmed more than twice before next erase. 3 fast v pp rise time may potentially trigger the esd protection struct ure, which may result in over current flowing into the pad and cause permanent damage to the pad. external filtering for the v pp power source is recommended. an example v pp filter is shown in figure 22 . table 16. flash characteristics (continued) characteristic symbol min typical 1 max unit 100 v pp 12 v 1 nf
electrical characteristics mc9rs08ka8 series mcu data sheet, rev. 2 freescale semiconductor 25 figure 23. flash program timing figure 24. flash mass erase timing pgm hven v pp 2 t vps t rs t nvh t rcv t vph t hv 1 next data applies if programming multip le bytes in a single row, refer to mc9rs08ka8 series reference manual . 2 v dd must be at a valid operating voltage before voltage is applied or removed from the v pp pin. write data 1 t nvs t pgs t prog data next data mass hven v pp 1 t vps t rs t nvh1 t rcv t vph t me 1 v dd must be at a valid operating voltage before voltage is applied or removed from the v pp pin. t nvs
mc9rs08ka8 series mcu data sheet, rev. 2 ordering information freescale semiconductor 26 4 ordering information this section contains ordering numbers for mc9rs08 ka8 series devices. see below for an example of the device numbering system. 5 mechanical drawings this following pages contain me chanical specifications for mc9r s08ka8 series package options. ? 16-pin pdip (plastic dual in-line pin) ? 16-pin w-soic (wide body small outline integrated circuit) ? 16-pin tssop (thin shrink ssmall outline package) ? 20-pin pdip (plastic dual in-line pin) ? 20-pin w-soic (wide body small outline integrated circuit) table 17. device numbering system device number memory package flash ram type designator document no. mc9rs08ka8 mc9rs08ka4 8k bytes 4k bytes 254 bytes 126 bytes 16 pdip pg 98asb42431b 16 w-soic wg 98asb42567b 16 tssop tg 98ash70247a 20 pdip pj 98asb42899b 20 w-soic wj 98asb42343b mc temperature range family memory status core (c = ?40 c to 85 c) (9 = flash-based) 9 rs08 ka xx (mc = fully qualified) package designator (see ta bl e 1 7 ) 8 approximate memory size (in kb) c

document number: mc9rs08ka8 rev. 2 10/2008 how to reach us: home page: www.freescale.com web support: http://www.freescale.com/support usa/europe or locations not listed: freescale semiconductor, inc. technical information center, el516 2100 east elliot road tempe, arizona 85284 1-800-521-6274 or +1-480-768-2130 www.freescale.com/support europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) www.freescale.com/support japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor china ltd. exchange building 23f no. 118 jianguo road chaoyang district beijing 100022 china +86 10 5879 8000 support.asia@freescale.com for literature requests only: freescale semiconductor literature distribution center p.o. box 5405 denver, colorado 80217 1-800-441-2447 or +1-303-675-2140 fax: +1-303-675-2150 ldcforfreescalesemiconductor@hibbertgroup.com information in this document is provided solely to enable system and software implementers to use freescale semiconductor products. there are no express or implied copyright licenses granted hereunde r to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental dam ages. ?typical? parameters that may be provided in freescale semiconductor data sheets and/or specificat ions can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale semiconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applic ations intended to support or sustain life, or for any other application in which the failure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemni fy and hold freescale semiconductor and its officers, employees, subsidiaries, affili ates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable atto rney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. rohs-compliant and/or pb-free versions of freescale products have the functionality and electrical characteristics as thei r non-rohs-compliant and/or non-pb-free counterparts. for further information, see http://www.freescale.com or contact your freescale sales representative. for information on freescale?s environmental products program, go to http://www.freescale.com/epp. freescale? and the freescale logo are trademarks of freescale semiconductor, inc. all other product or service names are t he property of their respective owners. ? freescale semiconductor, inc. 2008. all rights reserved.

▲Up To Search▲

Price & Availability of MC9RS08KA8CTG

	To Download MC9RS08KA8CTG Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .